Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80556?usp=email )
Change subject: soc/intel/cannonlake: select SOC_INTEL_COMMON_BLOCK_DTT ......................................................................
soc/intel/cannonlake: select SOC_INTEL_COMMON_BLOCK_DTT
Select this at the SoC level (like other modern Intel SoCs), and drop it from individual boards which selected it.
Change-Id: I838ada7dfe948c58a5bb9805ade289b07368aa63 Signed-off-by: Matt DeVillier matt.devillier@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/80556 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Eric Lai ericllai@google.com Reviewed-by: Felix Singer service+coreboot-gerrit@felixsinger.de --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/puff/Kconfig M src/soc/intel/cannonlake/Kconfig 3 files changed, 1 insertion(+), 2 deletions(-)
Approvals: Nico Huber: Looks good to me, but someone else must approve build bot (Jenkins): Verified Eric Lai: Looks good to me, but someone else must approve Felix Singer: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 32ce7ed..493db33 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -26,7 +26,6 @@ select MAINBOARD_HAS_TPM2 select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE select SOC_INTEL_COMETLAKE_1 - select SOC_INTEL_COMMON_BLOCK_DTT select SPI_TPM select SYSTEM_TYPE_LAPTOP select TPM_GOOGLE_CR50 diff --git a/src/mainboard/google/puff/Kconfig b/src/mainboard/google/puff/Kconfig index 348aa1e..0abe53a 100644 --- a/src/mainboard/google/puff/Kconfig +++ b/src/mainboard/google/puff/Kconfig @@ -31,7 +31,6 @@ select RT8168_GET_MAC_FROM_VPD select RT8168_SET_LED_MODE select SOC_INTEL_COMETLAKE_1 - select SOC_INTEL_COMMON_BLOCK_DTT select SOC_INTEL_CSE_LITE_SKU select SPD_CACHE_IN_FMAP select SPD_READ_BY_WORD diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 0d1ad4d..ab2efc3 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -46,6 +46,7 @@ select SOC_INTEL_COMMON_BLOCK_CPU select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT select SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE + select SOC_INTEL_COMMON_BLOCK_DTT select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 select SOC_INTEL_COMMON_BLOCK_HDA