Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Subrata Banik.
Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )
Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table ......................................................................
Patch Set 6:
(6 comments)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/84103/comment/0693634b_1da9071a?usp... : PS5, Line 29: GPE1_STS
sure. will make the change. […]
Subrata,
One thing left is the case when GPE1 is support but we intend to use GPE0 with this Kconfig not selected, the defines here is duplicated. I add the #ifndef to support this case in the next patchset. Pls let me know what you think. thx.
I also run into the same GPE1 defines issue on the next CL https://review.coreboot.org/c/coreboot/+/84104. I am doing the same for pmclib.c there.
https://review.coreboot.org/c/coreboot/+/84103/comment/4d96ba44_9c12f2ba?usp... : PS5, Line 31:
drop one space
Acknowledged
https://review.coreboot.org/c/coreboot/+/84103/comment/5748defd_bf77c4f7?usp... : PS5, Line 31:
just use one space
Acknowledged
https://review.coreboot.org/c/coreboot/+/84103/comment/4d9b1486_ef5c494b?usp... : PS5, Line 114:
one space
Acknowledged
https://review.coreboot.org/c/coreboot/+/84103/comment/52c53585_9ad63252?usp... : PS5, Line 115: !fadt->gpe1_blk
we wish to program gpe1_blk_len if gpe1_blk is not zero. […]
Acknowledged
https://review.coreboot.org/c/coreboot/+/84103/comment/34729102_019e8a6b?usp... : PS5, Line 116: GPE1_REG_MAX
not defined
Acknowledged