[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Karthik Ramasubramanian, Matt DeVillier.

Yu-Ping Wu has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/83495?usp=email )

Change subject: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS
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Patch Set 5:

(1 comment)

File src/soc/amd/common/vboot/vbnv_cmos.c:

https://review.coreboot.org/c/coreboot/+/83495/comment/05689beb_e8194b6b?usp... :
PS4, Line 16: cmos_write(RTC_FREQ_SELECT_AMD, RTC_FREQ_SELECT);
> calling cmos_init(0) just like how it is done in ramstage during every boot

That sounds fine, if intel is doing the same (calling cmos_init in RO). Done.