Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60091 )
Change subject: soc/intel/denverton_ns: Fix MRC_RW_CACHE
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File src/soc/intel/denverton_ns/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/60091/comment/97075144_c96020ca
PS1, Line 15: #include <intelblocks/fast_spi.h>
Already included on line 8
Done
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