[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x/azalia.c: Read 16 bits on HDA_STATESTS_REG

[Elyes Haouas (Code Review)]

Attention is currently required from: Patrick Rudolph.
Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61846 )

Change subject: sb/intel/bd82x6x/azalia.c: Read 16 bits on HDA_STATESTS_REG
......................................................................

sb/intel/bd82x6x/azalia.c: Read 16 bits on HDA_STATESTS_REG

HDA_STATESTS_REG is a 16 bits register, so correct the codec_mask
and read 16bits.

Change-Id: I5d879462bbc390aa85c75e18d124175da5e34adb
Signed-off-by: Elyes Haouas 
---
M src/southbridge/intel/bd82x6x/azalia.c
1 file changed, 8 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/61846/1

diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index 0a0b515..b0aa0c2 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -12,9 +12,10 @@
 #include "chip.h"
 #include "pch.h"

-static int codec_detect(u8 *base)
+static u16 codec_detect(u8 *base)
 {
-	u8 reg8;
+	const u16 codec_mask = (1 << CONFIG_AZALIA_MAX_CODECS) - 1
+	u16 reg16;

if (azalia_exit_reset(base) < 0)
    	goto no_codec;
@@ -23,12 +24,12 @@
    write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));

/* Read in Codec location (BAR + 0xe)[2..0] */
-	reg8 = read8(base + HDA_STATESTS_REG);
-	reg8 &= 0x0f;
-	if (!reg8)
+	reg16 = read16(base + HDA_STATESTS_REG);
+	reg16 &= codec_mask;
+	if (!reg16)
    	goto no_codec;

-	return reg8;
+	return reg16;

no_codec:
    /* Codec not found, put HDA back in reset */
@@ -41,7 +42,7 @@
 {
    u8 *base;
    struct resource *res;
-	u32 codec_mask;
+	u16 codec_mask;
    u32 reg32;

res = probe_resource(dev, PCI_BASE_ADDRESS_0);