[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel/xeon_sp: Add acpigen_write_pci_root_port

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82252?usp=email )

Change subject: soc/intel/xeon_sp: Add acpigen_write_pci_root_port
......................................................................

Patch Set 5:

(1 comment)

File src/soc/intel/xeon_sp/acpi.c:

https://review.coreboot.org/c/coreboot/+/82252/comment/19bad06f_a1415ca8?usp... :
PS4, Line 194: acpigen_write_BBN
> missing _SEG

Yeah ... there are indeed issues around here. I checked the ACPI spec and _SEG/_BBN should only be used for PCI host bridges, which is aligned to UEFI bootloader's usage as well. Hence I need to remove the _BBN here.

6.5.5 _BBN (Base Bus Number)
For multi-root PCI platforms, the _BBN object evaluates to the PCI bus number that the platform boot
firmware assigns. This is needed to access a PCI_Config operation region for the specific bus. The _BBN
object is located under a PCI host bridge and must be unique for every host bridge within a segment since
it is the PCI bus number.