Attention is currently required from: Arthur Heymans, Christian Walter, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lean Sheng Tan, Nick Vaccaro, Patrick Rudolph, Rishika Raj, Sean Rhodes, Shuo Liu, Tarun, Tim Chu, Werner Zeh.
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84183?usp=email )
Change subject: soc/intel: Refactor ITSS macros ......................................................................
soc/intel: Refactor ITSS macros
This patch refactors ITSS related SoC specific macros by consolidating them into a common itss.h file. This improves code maintainability and reduces redundancy as each SoC previously defined the same macros.
Specific changes include:
- Move SoC specific ITSS macros into intelblocks/itss.h. - SoC code now includes intelblocks/itss.h instead of the SoC-local soc/itss.h. - Drop soc/itss.h from static ASL files. - Delete soc/itss.h from all SoC locals except Apollo Lake and Sky Lake.
TEST=Able to build and boot google/hatch, google/xol and google/karis.
Change-Id: I6461dc93b0d21bec5429075bc26435bae3754d74 Signed-off-by: Subrata Banik subratabanik@google.com --- M src/soc/intel/alderlake/acpi/southbridge.asl M src/soc/intel/alderlake/chip.c D src/soc/intel/alderlake/include/soc/itss.h M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/include/soc/itss.h D src/soc/intel/cannonlake/include/soc/itss.h M src/soc/intel/common/block/include/intelblocks/itss.h M src/soc/intel/common/block/itss/itss.c M src/soc/intel/elkhartlake/acpi/southbridge.asl M src/soc/intel/elkhartlake/chip.c D src/soc/intel/elkhartlake/include/soc/itss.h M src/soc/intel/jasperlake/acpi/southbridge.asl M src/soc/intel/jasperlake/chip.c D src/soc/intel/jasperlake/include/soc/itss.h M src/soc/intel/meteorlake/acpi/southbridge.asl M src/soc/intel/meteorlake/chip.c D src/soc/intel/meteorlake/include/soc/itss.h M src/soc/intel/skylake/acpi/pch.asl M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/include/soc/itss.h M src/soc/intel/tigerlake/acpi/southbridge.asl M src/soc/intel/tigerlake/chip.c D src/soc/intel/tigerlake/include/soc/itss.h M src/soc/intel/xeon_sp/gnr/soc_acpi.c D src/soc/intel/xeon_sp/include/soc/itss.h 25 files changed, 8 insertions(+), 93 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/84183/1
diff --git a/src/soc/intel/alderlake/acpi/southbridge.asl b/src/soc/intel/alderlake/acpi/southbridge.asl index af641db..651d26c 100644 --- a/src/soc/intel/alderlake/acpi/southbridge.asl +++ b/src/soc/intel/alderlake/acpi/southbridge.asl @@ -2,7 +2,6 @@
#include <intelblocks/itss.h> #include <intelblocks/pcr.h> -#include <soc/itss.h> #include <soc/pcr_ids.h>
/* PCR access */ diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c index 8979ae0f6..23a05de 100644 --- a/src/soc/intel/alderlake/chip.c +++ b/src/soc/intel/alderlake/chip.c @@ -15,7 +15,6 @@ #include <intelblocks/xdci.h> #include <soc/hsphy.h> #include <soc/intel/common/vbt.h> -#include <soc/itss.h> #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcie.h> diff --git a/src/soc/intel/alderlake/include/soc/itss.h b/src/soc/intel/alderlake/include/soc/itss.h deleted file mode 100644 index 0ea8ff1..0000000 --- a/src/soc/intel/alderlake/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_ADL_ITSS_H -#define SOC_INTEL_ADL_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_ADL_ITSS_H */ diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 1d15eec..1d74db5 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -29,7 +29,6 @@ #include <soc/heci.h> #include <soc/intel/common/vbt.h> #include <soc/iomap.h> -#include <soc/itss.h> #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/pm.h> diff --git a/src/soc/intel/apollolake/include/soc/itss.h b/src/soc/intel/apollolake/include/soc/itss.h index b88dfd8..03ba785 100644 --- a/src/soc/intel/apollolake/include/soc/itss.h +++ b/src/soc/intel/apollolake/include/soc/itss.h @@ -3,11 +3,9 @@ #ifndef _SOC_APOLLOLAKE_ITSS_H_ #define _SOC_APOLLOLAKE_ITSS_H_
+#include <intelblocks/itss.h> + #define GPIO_IRQ_START 50 #define GPIO_IRQ_END ITSS_MAX_IRQ
-#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - #endif /* _SOC_APOLLOLAKE_ITSS_H_ */ diff --git a/src/soc/intel/cannonlake/include/soc/itss.h b/src/soc/intel/cannonlake/include/soc/itss.h deleted file mode 100644 index 902b8e2..0000000 --- a/src/soc/intel/cannonlake/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_CNL_ITSS_H -#define SOC_INTEL_CNL_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_CNL_ITSS_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/itss.h b/src/soc/intel/common/block/include/intelblocks/itss.h index 4d26b25..84ba7b4 100644 --- a/src/soc/intel/common/block/include/intelblocks/itss.h +++ b/src/soc/intel/common/block/include/intelblocks/itss.h @@ -3,6 +3,10 @@ #ifndef SOC_INTEL_COMMON_BLOCK_ITSS_H #define SOC_INTEL_COMMON_BLOCK_ITSS_H
+#define ITSS_MAX_IRQ 119 +#define IRQS_PER_IPC 32 +#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) + /* PIRQA Routing Control Register */ #define PCR_ITSS_PIRQA_ROUT 0x3100 /* PIRQB Routing Control Register */ diff --git a/src/soc/intel/common/block/itss/itss.c b/src/soc/intel/common/block/itss/itss.c index 79ed5d0..50e4c38 100644 --- a/src/soc/intel/common/block/itss/itss.c +++ b/src/soc/intel/common/block/itss/itss.c @@ -5,7 +5,6 @@ #include <console/console.h> #include <intelblocks/itss.h> #include <intelblocks/pcr.h> -#include <soc/itss.h> #include <soc/pcr_ids.h> #include <southbridge/intel/common/acpi_pirq_gen.h>
diff --git a/src/soc/intel/elkhartlake/acpi/southbridge.asl b/src/soc/intel/elkhartlake/acpi/southbridge.asl index 8b0748d..deb626d 100644 --- a/src/soc/intel/elkhartlake/acpi/southbridge.asl +++ b/src/soc/intel/elkhartlake/acpi/southbridge.asl @@ -2,7 +2,6 @@
#include <intelblocks/itss.h> #include <intelblocks/pcr.h> -#include <soc/itss.h> #include <soc/pcr_ids.h>
/* PCI IRQ assignment */ diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c index f9e4e0e..138d625 100644 --- a/src/soc/intel/elkhartlake/chip.c +++ b/src/soc/intel/elkhartlake/chip.c @@ -12,7 +12,6 @@ #include <intelblocks/systemagent.h> #include <intelblocks/xdci.h> #include <soc/intel/common/vbt.h> -#include <soc/itss.h> #include <soc/pci_devs.h> #include <soc/pcie.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/elkhartlake/include/soc/itss.h b/src/soc/intel/elkhartlake/include/soc/itss.h deleted file mode 100644 index 90a4af2..0000000 --- a/src/soc/intel/elkhartlake/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_EHL_ITSS_H -#define SOC_INTEL_EHL_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_EHL_ITSS_H */ diff --git a/src/soc/intel/jasperlake/acpi/southbridge.asl b/src/soc/intel/jasperlake/acpi/southbridge.asl index a463304..63b2dfa 100644 --- a/src/soc/intel/jasperlake/acpi/southbridge.asl +++ b/src/soc/intel/jasperlake/acpi/southbridge.asl @@ -2,7 +2,6 @@
#include <intelblocks/itss.h> #include <intelblocks/pcr.h> -#include <soc/itss.h> #include <soc/pcr_ids.h>
/* PCI IRQ assignment */ diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c index 184e6ed..6b4c74c 100644 --- a/src/soc/intel/jasperlake/chip.c +++ b/src/soc/intel/jasperlake/chip.c @@ -12,7 +12,6 @@ #include <intelblocks/systemagent.h> #include <intelblocks/xdci.h> #include <soc/intel/common/vbt.h> -#include <soc/itss.h> #include <soc/pci_devs.h> #include <soc/pcie.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/jasperlake/include/soc/itss.h b/src/soc/intel/jasperlake/include/soc/itss.h deleted file mode 100644 index ba1a1c2..0000000 --- a/src/soc/intel/jasperlake/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_JSL_ITSS_H -#define SOC_INTEL_JSL_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_JSL_ITSS_H */ diff --git a/src/soc/intel/meteorlake/acpi/southbridge.asl b/src/soc/intel/meteorlake/acpi/southbridge.asl index e89b656..5e8042e 100644 --- a/src/soc/intel/meteorlake/acpi/southbridge.asl +++ b/src/soc/intel/meteorlake/acpi/southbridge.asl @@ -2,7 +2,6 @@
#include <intelblocks/itss.h> #include <intelblocks/pcr.h> -#include <soc/itss.h> #include <soc/pcr_ids.h>
/* SoC PCR access */ diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index 51e89dc..84b9235b2 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -18,7 +18,6 @@ #include <soc/intel/common/reset.h> #include <soc/intel/common/vbt.h> #include <soc/iomap.h> -#include <soc/itss.h> #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcie.h> diff --git a/src/soc/intel/meteorlake/include/soc/itss.h b/src/soc/intel/meteorlake/include/soc/itss.h deleted file mode 100644 index cee8245..0000000 --- a/src/soc/intel/meteorlake/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_MTL_ITSS_H -#define SOC_INTEL_MTL_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_MTL_ITSS_H */ diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index a2ab35c..8326633 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -4,7 +4,6 @@ #include <intelblocks/pcr.h> #include <soc/iomap.h> #include <soc/irq.h> -#include <soc/itss.h> #include <soc/gpe.h> #include <soc/pcr_ids.h>
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 050a272..5262dde 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -23,7 +23,6 @@ #include <soc/interrupt.h> #include <soc/iomap.h> #include <soc/irq.h> -#include <soc/itss.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/systemagent.h> diff --git a/src/soc/intel/skylake/include/soc/itss.h b/src/soc/intel/skylake/include/soc/itss.h index 8bb0e12..9501b14 100644 --- a/src/soc/intel/skylake/include/soc/itss.h +++ b/src/soc/intel/skylake/include/soc/itss.h @@ -3,11 +3,9 @@ #ifndef SOC_INTEL_SKL_ITSS_H #define SOC_INTEL_SKL_ITSS_H
+#include <intelblocks/itss.h> + #define GPIO_IRQ_START 50 #define GPIO_IRQ_END ITSS_MAX_IRQ
-#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - #endif /* SOC_INTEL_SKL_ITSS_H */ diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index c54bc67..23536b3 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -2,7 +2,6 @@
#include <intelblocks/itss.h> #include <intelblocks/pcr.h> -#include <soc/itss.h> #include <soc/pcr_ids.h>
/* PCR access */ diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c index c94e727..f90f8ad 100644 --- a/src/soc/intel/tigerlake/chip.c +++ b/src/soc/intel/tigerlake/chip.c @@ -13,7 +13,6 @@ #include <intelblocks/systemagent.h> #include <intelblocks/xdci.h> #include <soc/intel/common/vbt.h> -#include <soc/itss.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/soc_chip.h> diff --git a/src/soc/intel/tigerlake/include/soc/itss.h b/src/soc/intel/tigerlake/include/soc/itss.h deleted file mode 100644 index 0291dc8..0000000 --- a/src/soc/intel/tigerlake/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_TGL_ITSS_H -#define SOC_INTEL_TGL_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_TGL_ITSS_H */ diff --git a/src/soc/intel/xeon_sp/gnr/soc_acpi.c b/src/soc/intel/xeon_sp/gnr/soc_acpi.c index c91ed16..54c0cd2 100644 --- a/src/soc/intel/xeon_sp/gnr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/gnr/soc_acpi.c @@ -11,7 +11,6 @@ #include <soc/numa.h> #include <soc/soc_util.h> #include <soc/util.h> -#include <soc/itss.h> #include <soc/pcr_ids.h>
int soc_madt_sci_irq_polarity(int sci) diff --git a/src/soc/intel/xeon_sp/include/soc/itss.h b/src/soc/intel/xeon_sp/include/soc/itss.h deleted file mode 100644 index 3be9b8b..0000000 --- a/src/soc/intel/xeon_sp/include/soc/itss.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef SOC_INTEL_XEON_SP_ITSS_H -#define SOC_INTEL_XEON_SP_ITSS_H - -#define ITSS_MAX_IRQ 119 -#define IRQS_PER_IPC 32 -#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) - -#endif /* SOC_INTEL_XEON_SP_ITSS_H */