Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74657 )
Change subject: soc/amd/phoenix/xhci: add SCI sources for the two USB4 controllers ......................................................................
soc/amd/phoenix/xhci: add SCI sources for the two USB4 controllers
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I95916e409b3fbd4941a861054733a34100244da9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74657 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martin.roth@amd.corp-partner.google.com Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Fred Reitberger reitbergerfred@gmail.com --- M src/soc/amd/phoenix/xhci.c 1 file changed, 37 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Fred Reitberger: Looks good to me, approved Martin Roth: Looks good to me, approved
diff --git a/src/soc/amd/phoenix/xhci.c b/src/soc/amd/phoenix/xhci.c index 8bb446f..99033f9 100644 --- a/src/soc/amd/phoenix/xhci.c +++ b/src/soc/amd/phoenix/xhci.c @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* TODO: Update for Phoenix */ - #include <amdblocks/gpio.h> #include <amdblocks/smi.h> #include <amdblocks/xhci.h> @@ -24,6 +22,18 @@ .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG + }, + { + .scimap = SMITYPE_XHC3_PME, + .gpe = XHCI_GEVENT, + .direction = SMI_SCI_LVL_HIGH, + .level = SMI_SCI_EDG + }, + { + .scimap = SMITYPE_XHC4_PME, + .gpe = XHCI_GEVENT, + .direction = SMI_SCI_LVL_HIGH, + .level = SMI_SCI_EDG } };
@@ -45,6 +55,16 @@ } }
+ if (dev->bus->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) { + if (dev->path.pci.devfn == USB4_XHCI0_DEVFN) { + *gpe = xhci_sci_sources[2].gpe; + return CB_SUCCESS; + } else if (dev->path.pci.devfn == USB4_XHCI1_DEVFN) { + *gpe = xhci_sci_sources[3].gpe; + return CB_SUCCESS; + } + } + return CB_ERR_ARG; }