Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68559 )
Change subject: soc/amd: move all AOAC function prototypes to amdblocks/aoac.h ......................................................................
soc/amd: move all AOAC function prototypes to amdblocks/aoac.h
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I3deae150cd1e20fff6507a0f0ba6a375fca430e5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68559 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Fred Reitberger reitbergerfred@gmail.com --- M src/soc/amd/cezanne/early_fch.c M src/soc/amd/cezanne/include/soc/southbridge.h M src/soc/amd/common/block/include/amdblocks/aoac.h M src/soc/amd/common/psp_verstage/fch.c M src/soc/amd/mendocino/early_fch.c M src/soc/amd/mendocino/include/soc/southbridge.h M src/soc/amd/morgana/early_fch.c M src/soc/amd/morgana/include/soc/southbridge.h M src/soc/amd/picasso/early_fch.c M src/soc/amd/picasso/include/soc/southbridge.h M src/soc/amd/stoneyridge/early_fch.c M src/soc/amd/stoneyridge/include/soc/southbridge.h 12 files changed, 22 insertions(+), 13 deletions(-)
Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 4935f66..0b8e9a0 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/acpimmio.h> +#include <amdblocks/aoac.h> #include <amdblocks/espi.h> #include <amdblocks/i2c.h> #include <amdblocks/lpc.h> diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h index 4e44b89..4cd53cb 100644 --- a/src/soc/amd/cezanne/include/soc/southbridge.h +++ b/src/soc/amd/cezanne/include/soc/southbridge.h @@ -118,7 +118,4 @@ void fch_init(void *chip_info); void fch_final(void *chip_info);
-void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_CEZANNE_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/common/block/include/amdblocks/aoac.h b/src/soc/amd/common/block/include/amdblocks/aoac.h index 455f32d..3944e2e 100644 --- a/src/soc/amd/common/block/include/amdblocks/aoac.h +++ b/src/soc/amd/common/block/include/amdblocks/aoac.h @@ -35,5 +35,8 @@ bool is_aoac_device_enabled(unsigned int dev); void power_on_aoac_device(unsigned int dev); void power_off_aoac_device(unsigned int dev); +/* the following 2 functions are implemented in the SoC code */ +void enable_aoac_devices(void); +void wait_for_aoac_enabled(unsigned int dev);
#endif /* AMD_BLOCK_AOAC_H */ diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c index d4dcd21..7f850fd 100644 --- a/src/soc/amd/common/psp_verstage/fch.c +++ b/src/soc/amd/common/psp_verstage/fch.c @@ -3,6 +3,7 @@ #include "psp_verstage.h"
#include <amdblocks/acpimmio.h> +#include <amdblocks/aoac.h> #include <amdblocks/espi.h> #include <amdblocks/i2c.h> #include <amdblocks/spi.h> diff --git a/src/soc/amd/mendocino/early_fch.c b/src/soc/amd/mendocino/early_fch.c index 3331737..a1cf908 100644 --- a/src/soc/amd/mendocino/early_fch.c +++ b/src/soc/amd/mendocino/early_fch.c @@ -3,6 +3,7 @@ /* TODO: Check if this is still correct */
#include <amdblocks/acpimmio.h> +#include <amdblocks/aoac.h> #include <amdblocks/espi.h> #include <amdblocks/i2c.h> #include <amdblocks/lpc.h> diff --git a/src/soc/amd/mendocino/include/soc/southbridge.h b/src/soc/amd/mendocino/include/soc/southbridge.h index a5a1be4..52c2606 100644 --- a/src/soc/amd/mendocino/include/soc/southbridge.h +++ b/src/soc/amd/mendocino/include/soc/southbridge.h @@ -121,7 +121,4 @@ void fch_init(void *chip_info); void fch_final(void *chip_info);
-void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_MENDOCINO_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/morgana/early_fch.c b/src/soc/amd/morgana/early_fch.c index 1ec7105..f940dea 100644 --- a/src/soc/amd/morgana/early_fch.c +++ b/src/soc/amd/morgana/early_fch.c @@ -3,6 +3,7 @@ /* TODO: Update for Morgana */
#include <amdblocks/acpimmio.h> +#include <amdblocks/aoac.h> #include <amdblocks/espi.h> #include <amdblocks/i2c.h> #include <amdblocks/lpc.h> diff --git a/src/soc/amd/morgana/include/soc/southbridge.h b/src/soc/amd/morgana/include/soc/southbridge.h index 75f0beb..216bf42 100644 --- a/src/soc/amd/morgana/include/soc/southbridge.h +++ b/src/soc/amd/morgana/include/soc/southbridge.h @@ -121,7 +121,4 @@ void fch_init(void *chip_info); void fch_final(void *chip_info);
-void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_MORGANA_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index f5d392c..e77f296 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/acpimmio.h> +#include <amdblocks/aoac.h> #include <amdblocks/espi.h> #include <amdblocks/i2c.h> #include <amdblocks/lpc.h> diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index b8dd67b..a3fb1a2 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -107,7 +107,4 @@ void fch_init(void *chip_info); void fch_final(void *chip_info);
-void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_PICASSO_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/stoneyridge/early_fch.c b/src/soc/amd/stoneyridge/early_fch.c index 763e3f2..5e2be61 100644 --- a/src/soc/amd/stoneyridge/early_fch.c +++ b/src/soc/amd/stoneyridge/early_fch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/acpimmio.h> +#include <amdblocks/aoac.h> #include <amdblocks/i2c.h> #include <amdblocks/lpc.h> #include <amdblocks/pmlib.h> diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 32c102c..26500ef 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -181,7 +181,6 @@ void fch_init(void *chip_info); void fch_final(void *chip_info);
-void enable_aoac_devices(void); void fch_clk_output_48Mhz(u32 osc);
void set_uart_config(unsigned int idx);