Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41069 )
Change subject: soc/amd/common/block/lpc: Add config options for eSPI ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41069/1/src/soc/amd/common/block/lp... File src/soc/amd/common/block/lpc/Kconfig:
https://review.coreboot.org/c/coreboot/+/41069/1/src/soc/amd/common/block/lp... PS1, Line 19: Select this option if mainboard uses eSPI instead of LPC (if supported
Thanks Raul. I see you updated your patchset. […]
I spent some time evaluating this option and I don't think it is really possible to simply add espi and lpc devices under the LPC bridge. There are numerous assumptions in common EC code that the EC lives under LPCB device. Adding anything in between would lead to all kinds of breakages. Also, most of the EC code is currently all asl based (and this is not just about Chrome EC. Even other ECs have the same assumptions).
If we have to add a device under LPC Bridge, then we need to change all EC drivers to generate ACPI tables using SSDT and then update all SoCs which make direct references to LPCB.EC0 device. I think this is way out of scope of the current effort.
I explored a few options on how we can trick acpi_device_name()/acpi_device_path() to emit only one device name even if the device tree exposes 2 devices. But, this is going to lead to uglier hacks.
Again, I go back to my original argument that from a practical standpoint having LPC and eSPI for real devices (non-reference platforms) is not really something we need to worry about for now. So, I think we should continue with the Kconfig options that this CL sets up.