Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68646 )
Change subject: mb/google/brya: Enable SaGv for brask variants ......................................................................
mb/google/brya: Enable SaGv for brask variants
SaGv is enabled for all brya variants, so it should be harmless to enable it for brask variants to save some power.
BUG=254374912 TEST=Build and boot to Chrome OS
Signed-off-by: Derek Huang derekhuang@google.com Change-Id: Ib5d1e39b3f901606e2f1449e4ed40d53696562ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/68646 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/brya/variants/brask/overridetree.cb M src/mainboard/google/brya/variants/gaelin/overridetree.cb M src/mainboard/google/brya/variants/kuldax/overridetree.cb M src/mainboard/google/brya/variants/moli/overridetree.cb 4 files changed, 26 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index 88c73ad..6c66d79 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -6,6 +6,8 @@ end
chip soc/intel/alderlake + register "sagv" = "SaGv_Enabled" + device domain 0 on device ref dtt on chip drivers/intel/dptf diff --git a/src/mainboard/google/brya/variants/gaelin/overridetree.cb b/src/mainboard/google/brya/variants/gaelin/overridetree.cb index 4f2c04a..caa874b 100644 --- a/src/mainboard/google/brya/variants/gaelin/overridetree.cb +++ b/src/mainboard/google/brya/variants/gaelin/overridetree.cb @@ -1,4 +1,5 @@ chip soc/intel/alderlake + register "sagv" = "SaGv_Enabled"
device domain 0 on end diff --git a/src/mainboard/google/brya/variants/kuldax/overridetree.cb b/src/mainboard/google/brya/variants/kuldax/overridetree.cb index 8471272..fdf37d5 100644 --- a/src/mainboard/google/brya/variants/kuldax/overridetree.cb +++ b/src/mainboard/google/brya/variants/kuldax/overridetree.cb @@ -6,6 +6,8 @@ end
chip soc/intel/alderlake + register "sagv" = "SaGv_Enabled" + register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2 Port 1 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2 Port 2 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4 diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index 2d35e14..5612b6e 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -14,6 +14,7 @@ end end chip soc/intel/alderlake + register "sagv" = "SaGv_Enabled" # Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2 register "ddi_ports_config" = "{ [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,