Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4174
-gerrit
commit d2571d649963cbadecd7984438c2e56b4fae8bec Author: Stefan Reinauer reinauer@chromium.org Date: Fri May 17 11:56:09 2013 -0700
libpayload (EHCI): correctly align PORTSC
Two structures in the USB EHCI stack were pointing to hardware but not marked attribute((packed)) hence leaving it to GCC to correctly align the data structures.
Next, the number of reserved bytes in hc_op_t was wrong (but implicitly aligned to the correct values on x86)
It seems this worked fine on x86, but on ARM it was doing the wrong thing.
Signed-off-by: Stefan Reinauer reinauer@google.com
Change-Id: I94bed4850ded7d3f7bbc7ff3079c103c6054c22d Reviewed-on: https://gerrit.chromium.org/gerrit/55555 Commit-Queue: Stefan Reinauer reinauer@google.com Reviewed-by: Stefan Reinauer reinauer@google.com Tested-by: Stefan Reinauer reinauer@google.com --- payloads/libpayload/drivers/usb/ehci_private.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/payloads/libpayload/drivers/usb/ehci_private.h b/payloads/libpayload/drivers/usb/ehci_private.h index 3b9faf6..3365be1 100644 --- a/payloads/libpayload/drivers/usb/ehci_private.h +++ b/payloads/libpayload/drivers/usb/ehci_private.h @@ -78,10 +78,10 @@ typedef volatile struct { u32 ctrldssegment; u32 periodiclistbase; u32 asynclistaddr; - u8 res1[0x3f-0x1c]; + u8 res1[0x40-0x1c]; u32 configflag; portsc_t portsc[0]; -} hc_op_t; +} __attribute__ ((packed)) hc_op_t;
typedef volatile struct { #define QTD_TERMINATE 1 @@ -130,7 +130,7 @@ typedef volatile struct { #define QH_PIPE_MULTIPLIER_SHIFT 30 volatile u32 current_td_ptr; volatile qtd_t td; -} ehci_qh_t; +} __attribute__ ((packed)) ehci_qh_t;
typedef struct ehci { hc_cap_t *capabilities;