Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16714
-gerrit
commit 2adfb7e3945a742a57bc6da15308b06ccb3ecf3a Author: Julius Werner jwerner@chromium.org Date: Mon Sep 12 15:46:02 2016 -0700
rockchip/rk3399: Move TTB to the end of SRAM
We found that we may want to load some components of BL31 on the RK3399 into SRAM. As usual, these components may not overlap any coreboot regions still in use at that time, as is already statically checked by the check-ramstage-overlaps rule in Makefile.inc.
On RK3399, the only such regions are TTB and STACK. This patch moves the TTB region back to the end of SRAM (right before STACK), so that a large contiguous region of SRAM before that remains usable for BL31.
BRANCH=gru BUG=None TEST=Booted Kevin.
Change-Id: I1689d0280d79bad805fea5fc3759c2ae3ba24915 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 1d4c6c6f6cc0efe97d6962a81e309a1c040d1def Original-Change-Id: I37c94f2460ef63aec4526caabe58f35ae851bab0 Original-Signed-off-by: Julius Werner jwerner@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/384635 Original-Reviewed-by: Simon Glass sjg@google.com --- src/soc/rockchip/rk3399/include/soc/memlayout.ld | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/soc/rockchip/rk3399/include/soc/memlayout.ld b/src/soc/rockchip/rk3399/include/soc/memlayout.ld index 54cfbe1..ef8d29d 100644 --- a/src/soc/rockchip/rk3399/include/soc/memlayout.ld +++ b/src/soc/rockchip/rk3399/include/soc/memlayout.ld @@ -34,9 +34,9 @@ SECTIONS TIMESTAMP(0xFF8C1C00, 1K) BOOTBLOCK(0xFF8C2004, 36K - 4) PRERAM_CBFS_CACHE(0xFF8CB000, 4K) - TTB(0xFF8CC000, 24K) - OVERLAP_VERSTAGE_ROMSTAGE(0xFF8D2000, 92K) - VBOOT2_WORK(0XFF8E9000, 12K) + OVERLAP_VERSTAGE_ROMSTAGE(0xFF8CC000, 92K) + VBOOT2_WORK(0XFF8E3000, 12K) + TTB(0xFF8E6000, 24K) STACK(0xFF8EC000, 16K) SRAM_END(0xFF8F0000) }