Rishika Raj has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83549?usp=email )
Change subject: mainboard/google/brya/variants/orisa: Change board strap memory config ......................................................................
mainboard/google/brya/variants/orisa: Change board strap memory config
Reorder GPIO pin mapping as per platform documentation:
* GPIO_MEM_CONFIG_0 -> GPP_E2 * GPIO_MEM_CONFIG_1 -> GPP_E1 * GPIO_MEM_CONFIG_2 -> GPP_E12 * GPIO_MEM_CONFIG_3 -> NC
BUG=None TEST=None
Change-Id: I4e979686833095a904b114500dc1142def583afa Signed-off-by: Rishika Raj rishikaraj@google.com --- M src/mainboard/google/brya/variants/orisa/memory.c 1 file changed, 5 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/83549/1
diff --git a/src/mainboard/google/brya/variants/orisa/memory.c b/src/mainboard/google/brya/variants/orisa/memory.c index 2d73855..5e37fd5 100644 --- a/src/mainboard/google/brya/variants/orisa/memory.c +++ b/src/mainboard/google/brya/variants/orisa/memory.c @@ -78,14 +78,16 @@ { /* * Memory configuration board straps - * GPIO_MEM_CONFIG_0 GPP_E1 - * GPIO_MEM_CONFIG_1 GPP_E2 + * GPIO_MEM_CONFIG_0 GPP_E2 + * GPIO_MEM_CONFIG_1 GPP_E1 * GPIO_MEM_CONFIG_2 GPP_E12 + * GPIO_MEM_CONFIG_3 NC */ gpio_t spd_gpios[] = { - GPP_E1, GPP_E2, + GPP_E1, GPP_E12, + NC };
return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));