Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45927 )
Change subject: nb/intel/*/memmap.c: Use `postcar_frame_add_cbmem_top` ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45927/2/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/memmap.c:
https://review.coreboot.org/c/coreboot/+/45927/2/src/northbridge/intel/sandy... PS2, Line 41: uintptr_t top_of_ram = (uintptr_t)cbmem_top();
This variable can be eliminated now.
Thanks for noticing. Will move to /dev/null
https://review.coreboot.org/c/coreboot/+/45927/2/src/northbridge/intel/sandy... PS2, Line 49: postcar_frame_add_cbmem_top(pcf, 8 * MiB, 1);
Is the change of alignment from 8 MiB to 1 byte here intentional?
There's no change of alignment. The original code did not align `top_of_ram` at all. Given that TSEG needs to be aligned to 8 MiB because of SMRRs, this should make no difference. I'll inject a change forcing 8 MiB alignment before this one.