Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76135?usp=email )
Change subject: soc/intel/meteorlake: Add QS(C0) stepping CPU ID ......................................................................
soc/intel/meteorlake: Add QS(C0) stepping CPU ID
This patch adds CPU ID for C0 stepping (aka QS). DOC=#723567 TEST=Able to boot on C0 rvp (and rex) and get correct CPU Name in coreboot log.
Change-Id: I53e3b197f2a0090e178877c1eef783b41670ca83 Signed-off-by: Musse Abdullahi musse.abdullahi@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/76135 Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/cpu/intel/cpu_ids.h M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/meteorlake/bootblock/report_platform.c 3 files changed, 3 insertions(+), 0 deletions(-)
Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 2d64c5f..77b018f9 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -72,6 +72,7 @@ #define CPUID_METEORLAKE_A0_1 0xa06a0 #define CPUID_METEORLAKE_A0_2 0xa06a1 #define CPUID_METEORLAKE_B0 0xa06a2 +#define CPUID_METEORLAKE_C0 0xa06a4 #define CPUID_RAPTORLAKE_P_J0 0xb06a2 #define CPUID_RAPTORLAKE_P_Q0 0xb06a3
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 7466ff6..dfb4a04 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -35,6 +35,7 @@ { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_1, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_2, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_METEORLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_METEORLAKE_C0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_SKYLAKE_C0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_SKYLAKE_D0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_SKYLAKE_HQ0, CPUID_EXACT_MATCH_MASK }, diff --git a/src/soc/intel/meteorlake/bootblock/report_platform.c b/src/soc/intel/meteorlake/bootblock/report_platform.c index 3e8bc56..49d0661 100644 --- a/src/soc/intel/meteorlake/bootblock/report_platform.c +++ b/src/soc/intel/meteorlake/bootblock/report_platform.c @@ -20,6 +20,7 @@ { CPUID_METEORLAKE_A0_1, "MeteorLake A0" }, { CPUID_METEORLAKE_A0_2, "MeteorLake A0" }, { CPUID_METEORLAKE_B0, "MeteorLake B0" }, + { CPUID_METEORLAKE_C0, "MeteorLake C0" }, };
static struct {