[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/common: Add PsysPl1 support

[Reka Norman (Code Review)]

Attention is currently required from: ChiaLing, Ryan Lin, Zhuohao Lee.

Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75678?usp=email )

Change subject: soc/intel/common: Add PsysPl1 support
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Patch Set 2:

(1 comment)

File src/soc/intel/common/block/include/intelblocks/power_limit.h:

https://review.coreboot.org/c/coreboot/+/75678/comment/41f5858e_8d1ab4fd :
PS2, Line 39: 	/* Minimum ROP */
            : 	uint16_t min_rop;
> This is not related to PsysPl1. Please move it to the CL where it's used.

Actually, let's get rid of the min_rop calculation for now. We can leave pl4 at the default of 60W for now and discuss more in the bug about how to set it.