[coreboot-gerrit] [S] Change in coreboot[master]: mb/google/brya/var/taeko:Disable C1E for RPL CPU

[Paul Menzel (Code Review)]

Attention is currently required from: Tarun Tuli, YH Lin, Joey Peng, Nick Vaccaro, Eric Lai.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74727 )

Change subject: mb/google/brya/var/taeko:Disable C1E for RPL CPU
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Patch Set 6:

(6 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/74727/comment/c31c41c1_40a09a6f 
PS6, Line 7: mb/google/brya/var/taeko:Disable
Please add a space after the colon (:).

Patchset:

PS6: 
Please split it into two commits: one for the SOC and one for the mainboard.

File src/mainboard/google/brya/variants/taeko/variant.c:

https://review.coreboot.org/c/coreboot/+/74727/comment/3eaa5064_95a33abd 
PS6, Line 17: 	//Disable C1E for RPL CPU
Please add a space.

https://review.coreboot.org/c/coreboot/+/74727/comment/19ff1333_5110aaa2 
PS6, Line 21: Disabling
Disable

… to be consistent with *Keep* below.

https://review.coreboot.org/c/coreboot/+/74727/comment/422206fa_5829f7f4 
PS6, Line 24: 		config->c1e = 1;
Is there a default value? Should it be set explicitly?

File src/soc/intel/alderlake/chip.h:

https://review.coreboot.org/c/coreboot/+/74727/comment/5705a1b9_abf3c3a7 
PS6, Line 685: /* Enable or Disable C1E
             : 	 * Default is set to 1.
             : 	 * Set to 0 in order to disable C1E
             : 	 */
Please use the recommended style for multiline comments.