[coreboot-gerrit] Change in ...coreboot[master]: mb/google/hatch: Skip UART0 config in FSP

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32278

Change subject: mb/google/hatch: Skip UART0 config in FSP
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mb/google/hatch: Skip UART0 config in FSP

UART0 is already configured in coreboot, so this change sets SerialIo
config for UART0 to PchSerialIoSkipInit to skip initialization in FSP.

BUG=b:130325418

Change-Id: Ifc88f4fa11bff2144417d5194776c15f9f7b60ac
Signed-off-by: Furquan Shaikh 
---
M src/mainboard/google/hatch/variants/hatch/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/32278/1

diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
index bdc0256..5492379 100644
--- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
@@ -10,7 +10,7 @@
    	[PchSerialIoIndexSPI0] = PchSerialIoPci,
    	[PchSerialIoIndexSPI1] = PchSerialIoPci,
    	[PchSerialIoIndexSPI2] = PchSerialIoDisabled,
-		[PchSerialIoIndexUART0] = PchSerialIoPci,
+		[PchSerialIoIndexUART0] = PchSerialIoSkipInit,
    	[PchSerialIoIndexUART1] = PchSerialIoDisabled,
    	[PchSerialIoIndexUART2] = PchSerialIoDisabled,
    }"