Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31433
Change subject: soc/intel/common: Add whiskeylake celeron v-0 support ......................................................................
soc/intel/common: Add whiskeylake celeron v-0 support
New whiskeylake v-0 stepping have change the graphics device id from 0x3EA0 to 0x3EA1 for celeron, so delacre that in common code.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: Ief5213a96507124b90f8dd2eeea2f6bf43843dc6 --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c 2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/31433/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 751cca0..0030961 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2969,6 +2969,7 @@ #define PCI_DEVICE_ID_INTEL_APL_IGD_HD_500 0x5a85 #define PCI_DEVICE_ID_INTEL_GLK_IGD 0x3184 #define PCI_DEVICE_ID_INTEL_GLK_IGD_EU12 0x3185 +#define PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1 0x3EA1 #define PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1 0x3EA0 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1 0x5A51 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2 0x5A59 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 19a78e7..8eebd12 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -118,6 +118,7 @@ PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, PCI_DEVICE_ID_INTEL_GLK_IGD, PCI_DEVICE_ID_INTEL_GLK_IGD_EU12, + PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1, PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM,