Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Matt DeVillier.
Matt DeVillier has uploaded a new patch set (#2) to the change originally created by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/83400?usp=email )
Change subject: soc/amd/mendocino: Fix APOB NV size/base for non-vboot builds ......................................................................
soc/amd/mendocino: Fix APOB NV size/base for non-vboot builds
The APOB NV size/base are embedded into the amdfw binary and read by the PSP. These need to be synchronized with the FMAP region used by coreboot to store the APOB data. soc_update_apob_cache() will only use RECOVERY_MRC_CACHE if supported and if vboot is enabled, so the NV base passed to the PSP needs to reflect that as well.
This fixes the issue of RAM training running on every boot on non-vboot builds for Skyrim boards.
TEST=build/boot Skyrim (Frostflow), verify RAM training only run on first boot after flashing.
Change-Id: I9be1699d675331b46ee9c42570700c2b72588025 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/soc/amd/mendocino/Makefile.mk 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/83400/2