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Subrata Banik has posted comments on this change by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )
Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
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Patch Set 46:
(1 comment)
File src/soc/intel/pantherlake/acpi/southbridge.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/0c1faac6_531316e9?usp... :
PS23, Line 47: /* UFS 0:17:0 */
: #include "ufs.asl"
Ok sure, got the point.
So, you are suggesting to guard USF asl inclusion using "SOC_INTEL_PANTHERLAKE_U_H" , for initial commit once the IP is exposed.
ACPI devices require guarding because they are soft devices and won't be able to sense if the device is present or not. All PCI devices don't even need the guarding because during probing the PCI device won't bind if the UFS controller is not present in the PCI bus.
Assuming UFS only existed for PTL-U in the future and not for PTL-H (25W), things will even work without introducing a new Kconfig and need to implement CPP for ACPI code. I'm guessing we may only need Kconfig to override UFS UPDs if FSP logic doesn't account for the fact that UFS UPDs are not applicable for PTL-H (25W). If FSP is able to dynamically handle UFS UPDs even for PTL-H (25W), we are assuming that we are enabling UFS UPDs default enable for PTL-UH (while UFS is only applicable for PTL-U and not for PTL-H).
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