Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58167 )
Change subject: mb/siemens/mc_ehl2: Disable SATA Port 0 ......................................................................
mb/siemens/mc_ehl2: Disable SATA Port 0
This mainboard has only SATA Port 1 available with no device sleep feature.
Change-Id: I338833f2f9bcb407599cfc676ead0b8a9d7379bd Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/58167 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Werner Zeh werner.zeh@siemens.com Reviewed-by: Paul Menzel paulepanter@mailbox.org --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Werner Zeh: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 21f4626..062ac5f 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -87,7 +87,7 @@
# Storage (SATA/SDCARD/EMMC) related UPDs register "SataSalpSupport" = "0" - register "SataPortsEnable[0]" = "1" + register "SataPortsEnable[0]" = "0" register "SataPortsEnable[1]" = "1" register "SataPortsDevSlp[0]" = "0" register "SataPortsDevSlp[1]" = "0"
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.