Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48181 )
Change subject: soc/amd/stoneyridge: align AOAC code with Picasso ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48181/1/src/soc/amd/stoneyridge/sou... File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/c/coreboot/+/48181/1/src/soc/amd/stoneyridge/sou... PS1, Line 154: FCH_AOAC_PWR_ON_DEV
Outside the scope of this patch but picasso clears both b0 and b1 in byte before ORing. […]
i wasn't sure if i should add this here or in the follow up patch. i went the second route; see https://review.coreboot.org/c/coreboot/+/48183/1//COMMIT_MSG#9