Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48220 )
Change subject: soc/amd: move smi_util to common block ......................................................................
Patch Set 2:
(3 comments)
I've verified that this functionality applies to all Stoneyridge, Picasso and Cezanne. Cezanne has a few additional registers. There are also some differences in the smitype numbers, but i kept those in the soc-specific header files in the other related patch that's already merged
https://review.coreboot.org/c/coreboot/+/48220/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48220/1//COMMIT_MSG@10 PS1, Line 10: doesn't use any functions that are only present when this : option is selected
Maybe reword to end one sentence, stating what you're doing.
Done
https://review.coreboot.org/c/coreboot/+/48220/1//COMMIT_MSG@11 PS1, Line 11: so this patch also drops the guards in the : Makefile.inc file.
I'd make this a separate sentence, and not beginning with "so".
Done
https://review.coreboot.org/c/coreboot/+/48220/1/src/soc/amd/common/block/sm... File src/soc/amd/common/block/smi/smi_util.c:
https://review.coreboot.org/c/coreboot/+/48220/1/src/soc/amd/common/block/sm... PS1, Line 35: Valid values are 0 thru 23
I can't recall, without digging, if this is typically consistent across devices.
just checked and it's at least consistent between stoneyridge, picasso and cezanne