[coreboot-gerrit] Change in ...coreboot[master]: nb/intel/stage_cache.c: Drop unnecessary includes

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31714 )

Change subject: nb/intel/stage_cache.c: Drop unnecessary includes
......................................................................

nb/intel/stage_cache.c: Drop unnecessary includes

Change-Id: If6224c28012241e4925e05e14f0499857054f178
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31714
Tested-by: build bot (Jenkins) 
Reviewed-by: Kyösti Mälkki 
---
M src/northbridge/intel/gm45/stage_cache.c
M src/northbridge/intel/i945/stage_cache.c
M src/northbridge/intel/pineview/stage_cache.c
M src/northbridge/intel/x4x/stage_cache.c
4 files changed, 4 insertions(+), 12 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kyösti Mälkki: Looks good to me, approved

diff --git a/src/northbridge/intel/gm45/stage_cache.c b/src/northbridge/intel/gm45/stage_cache.c
index cbe4556..47f08c1 100644
--- a/src/northbridge/intel/gm45/stage_cache.c
+++ b/src/northbridge/intel/gm45/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */

-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "gm45.h"

void stage_cache_external_region(void **base, size_t *size)
 {
diff --git a/src/northbridge/intel/i945/stage_cache.c b/src/northbridge/intel/i945/stage_cache.c
index b659796..47f08c1 100644
--- a/src/northbridge/intel/i945/stage_cache.c
+++ b/src/northbridge/intel/i945/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */

-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "i945.h"

void stage_cache_external_region(void **base, size_t *size)
 {
diff --git a/src/northbridge/intel/pineview/stage_cache.c b/src/northbridge/intel/pineview/stage_cache.c
index 6f949e6..47f08c1 100644
--- a/src/northbridge/intel/pineview/stage_cache.c
+++ b/src/northbridge/intel/pineview/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */

-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "pineview.h"

void stage_cache_external_region(void **base, size_t *size)
 {
diff --git a/src/northbridge/intel/x4x/stage_cache.c b/src/northbridge/intel/x4x/stage_cache.c
index 8862c61..47f08c1 100644
--- a/src/northbridge/intel/x4x/stage_cache.c
+++ b/src/northbridge/intel/x4x/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */

-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "x4x.h"

void stage_cache_external_region(void **base, size_t *size)
 {