Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41690 )
Change subject: mb/ocp/deltalake: Config PCH PCIe ports ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41690/1/src/mainboard/ocp/deltalake... File src/mainboard/ocp/deltalake/romstage.c:
https://review.coreboot.org/c/coreboot/+/41690/1/src/mainboard/ocp/deltalake... PS1, Line 25: int index; uint_8
https://review.coreboot.org/c/coreboot/+/41690/1/src/mainboard/ocp/deltalake... PS1, Line 46: mupd->FspmConfig.PchPciePllSsc = 0xFE; Let's add a comment to explain the default is different.