[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Sridhar Siricilla, Patrick Rudolph.
Hello build bot (Jenkins), Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/55364

to look at the new patch set (#14).

Change subject: soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init
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soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init

The patch enables cse_fw_sync() before DRAM initialization.
cse_fw_sync() sends HECI commands in order to set CSE's boot partition
and to trigger CSE firmware update.
As part of CSE firmware update, coreboot sends HMRPFO_ENABLE HECI
command. Since CSE supports the command after DRAM Initialization,
cse_fw_sync() is called after DRAM initialization.

Starting from CSE Litev16.0.15.1545, CSE support HMRFPO_ENABLE command
before DRAM initialization too. So, cse_fw_sync() is called before DRAM
initialization.

BUG=b:175516533
TEST=Dependency with CSE Litev16.0.15.1545 integration

Change-Id: Iad7403650df8bc4e40aa6e48ccfeba95a5789a2d
Signed-off-by: Sridhar Siricilla 
---
M src/soc/intel/alderlake/romstage/romstage.c
1 file changed, 4 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/55364/14