Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39797 )
Change subject: vendorcode/intel/fsp: Update FSP header for Tiger Lake ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39797/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39797/2//COMMIT_MSG@12 PS2, Line 12: BUG=b:152000235 TEST=?
Did you try booting with these headers?
https://review.coreboot.org/c/coreboot/+/39797/2/src/vendorcode/intel/fsp/fs... File src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h:
https://review.coreboot.org/c/coreboot/+/39797/2/src/vendorcode/intel/fsp/fs... PS2, Line 896: 315
if you want i can split this Cl and make size correct first and then rebase this one on top of that […]
Thanks for the pointer Rohan. So, it looks like the header for some reason had changed the size here: https://review.coreboot.org/c/coreboot/+/38555. I think we can continue with this CL since it actually uses the correct size, but I am really concerned how the size change happened earlier if the headers are generated using a script.