Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46873 )
Change subject: mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg' ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46873/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46873/3//COMMIT_MSG@7 PS3, Line 7: into nit: to
https://review.coreboot.org/c/coreboot/+/46873/3//COMMIT_MSG@7 PS3, Line 7: mb/intel/adlrvp nit: I'd use `soc/intel/alderlake` here
https://review.coreboot.org/c/coreboot/+/46873/3/src/mainboard/intel/adlrvp/... File src/mainboard/intel/adlrvp/variants/adlrvp_p/memory.c:
https://review.coreboot.org/c/coreboot/+/46873/3/src/mainboard/intel/adlrvp/... PS3, Line 17: .ect = true, /* Early Command Training */ I think MRC will disable ECT for DDR4, so this should be false. (AFAIUI, DDR4 PDA is not stable until basic training is done, and at that point one can already perform Late Command Training instead).
This can be addressed in a follow-up.