Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63628 )
Change subject: lib: Check for non-existent DIMMs in check_if_dimm_changed ......................................................................
lib: Check for non-existent DIMMs in check_if_dimm_changed
Treat dimm addr_map 0 non-existent. addr_map default is 0, we don't set it if Hw is not present. Also change the test case default to avoid 0. SODIMM SMbus address 0x50 to 0x53 is commonly used.
BUG=b:213964936 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage The MRC training does not be performed again after rebooting.
Signed-off-by: Eric Lai eric_lai@quanta.corp-partner.google.com Change-Id: I2ada0109eb0805174cb85d4ce373e2a3ab7dbcac Reviewed-on: https://review.coreboot.org/c/coreboot/+/63628 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Frank Wu frank_wu@compal.corp-partner.google.com Reviewed-by: Lean Sheng Tan sheng.tan@9elements.com Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/lib/spd_cache.c M tests/lib/spd_cache-test.c 2 files changed, 14 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Frank Wu: Looks good to me, approved Lean Sheng Tan: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved Subrata Banik: Looks good to me, approved
diff --git a/src/lib/spd_cache.c b/src/lib/spd_cache.c index 44830a8..dff6ede 100644 --- a/src/lib/spd_cache.c +++ b/src/lib/spd_cache.c @@ -155,6 +155,10 @@ bool dimm_changed = false; /* Check if the dimm is the same with last system boot. */ for (i = 0; i < SC_SPD_NUMS && !dimm_changed; i++) { + if (blk->addr_map[i] == 0) { + printk(BIOS_NOTICE, "SPD_CACHE: DIMM%d does not exist\n", i); + continue; + } /* Return true if any error happened here. */ if (get_spd_sn(blk->addr_map[i], &sn) == CB_ERR) return true; diff --git a/tests/lib/spd_cache-test.c b/tests/lib/spd_cache-test.c index e1c1777..48f06e3 100644 --- a/tests/lib/spd_cache-test.c +++ b/tests/lib/spd_cache-test.c @@ -146,7 +146,8 @@ { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0};
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -162,7 +163,8 @@ { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0};
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -177,7 +179,8 @@ { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0};
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -194,7 +197,8 @@ { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0};
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz); @@ -212,7 +216,8 @@ { uint8_t *spd_cache; size_t spd_cache_sz; - struct spd_block blk = {.addr_map = {0}, .spd_array = {0}, .len = 0}; + struct spd_block blk = {.addr_map = {0x50, 0x51, 0x52, 0x53}, + .spd_array = {0}, .len = 0};
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz)); fill_spd_cache_ddr4(spd_cache, spd_cache_sz);