Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56515 )
Change subject: mb/google/brya: create dynamic power limits mechanism for thermal ......................................................................
mb/google/brya: create dynamic power limits mechanism for thermal
Add dynamic power limits selection mechanism for brya board based on CPU SKUs which is detectable at runtime.
BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya with below messages, On brya (282): Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000) On brya (482): Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000)
Change-Id: I86619516adeec13642f02ba7faf9fc4945ad774e Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/56515 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/brya/mainboard.c M src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc A src/mainboard/google/brya/variants/baseboard/brya/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h 4 files changed, 67 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c index 1b9e09a..388926f 100644 --- a/src/mainboard/google/brya/mainboard.c +++ b/src/mainboard/google/brya/mainboard.c @@ -26,6 +26,13 @@ base_pads = variant_gpio_table(&base_num); override_pads = variant_gpio_override_table(&override_num); gpio_configure_pads_with_override(base_pads, base_num, override_pads, override_num); + + variant_devtree_update(); +} + +void __weak variant_devtree_update(void) +{ + /* Override dev tree settings per board */ }
static void mainboard_dev_init(struct device *dev) diff --git a/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc b/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc index 1d38b77..9665436 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc +++ b/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc @@ -3,3 +3,4 @@ romstage-y += memory.c
ramstage-y += gpio.c +ramstage-y += ramstage.c diff --git a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c new file mode 100644 index 0000000..35cb488 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpi_device.h> +#include <baseboard/variants.h> +#include <console/console.h> +#include <device/pci_ops.h> +#include <soc/pci_devs.h> + +#include <drivers/intel/dptf/chip.h> + +void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries) +{ + if (!num_entries) + return; + + const struct device_path policy_path[] = { + { .type = DEVICE_PATH_PCI, .pci.devfn = SA_DEVFN_DPTF}, + { .type = DEVICE_PATH_GENERIC, .generic.id = 0} + }; + + const struct device *policy_dev = find_dev_nested_path(pci_root_bus(), + policy_path, ARRAY_SIZE(policy_path)); + if (!policy_dev) + return; + + struct drivers_intel_dptf_config *config = policy_dev->chip_info; + + uint16_t mchid = pci_s_read_config16(PCI_DEV(0, 0, 0), PCI_DEVICE_ID); + + for (size_t i = 0; i < num_entries; i++) { + if (mchid == limits[i].mchid) { + struct dptf_power_limits *settings = &config->controls.power_limits; + settings->pl1.min_power = limits[i].pl1_min_power; + settings->pl1.max_power = limits[i].pl1_max_power; + settings->pl2.min_power = limits[i].pl2_min_power; + settings->pl2.max_power = limits[i].pl2_max_power; + printk(BIOS_INFO, "Overriding DPTF power limits PL1 (%u, %u) PL2 (%u, %u)\n", + limits[i].pl1_min_power, + limits[i].pl1_max_power, + limits[i].pl2_min_power, + limits[i].pl2_max_power); + } + } +} diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index c938de8..b992129 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -22,4 +22,19 @@ bool variant_is_half_populated(void); void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config);
+/* Modify devictree settings during ramstage */ +void variant_devtree_update(void); + +struct cpu_power_limits { + uint16_t mchid; + unsigned int pl1_min_power; + unsigned int pl1_max_power; + unsigned int pl2_min_power; + unsigned int pl2_max_power; +}; + +/* Modify Power Limit devictree settings during ramstage */ +void variant_update_power_limits(const struct cpu_power_limits *limits, + size_t num_entries); + #endif /*__BASEBOARD_VARIANTS_H__ */