Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81908?usp=email )
Change subject: soc/sifive/fu540/memlayout.ld: Enhance OpenSBI size ......................................................................
soc/sifive/fu540/memlayout.ld: Enhance OpenSBI size
OpenSBI is currently overlapping with ramstage and the build therefore fails.
Signed-off-by: Maximilian Brune maximilian.brune@9elements.com Change-Id: I3523cac152e505b90a8f10ba03ea2b9f8604ab40 --- M src/soc/sifive/fu540/memlayout.ld 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/81908/1
diff --git a/src/soc/sifive/fu540/memlayout.ld b/src/soc/sifive/fu540/memlayout.ld index 8fc875d..74f580c 100644 --- a/src/soc/sifive/fu540/memlayout.ld +++ b/src/soc/sifive/fu540/memlayout.ld @@ -21,8 +21,8 @@ L2LIM_END(FU540_L2LIM + 2M)
DRAM_START(FU540_DRAM) - REGION(opensbi, FU540_DRAM, 128K, 4K) - RAMSTAGE(FU540_DRAM + 128K, 2M) - MEM_STACK(FU540_DRAM + 128K + 2M, 20K) + REGION(opensbi, FU540_DRAM, 256K, 4K) + RAMSTAGE(FU540_DRAM + 256K, 2M) + MEM_STACK(FU540_DRAM + 256K + 2M, 20K) POSTRAM_CBFS_CACHE(FU540_DRAM + 3M, 29M) }