[coreboot-gerrit] [S] Change in coreboot[master]: src: Move POST_BOOTBLOCK_CAR to common postcodes and use it

[Martin L Roth (Code Review)]

Attention is currently required from: Felix Singer, Elyes Haouas.

Hello Felix Singer, Elyes Haouas,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/71596

to look at the new patch set (#3).

Change subject: src: Move POST_BOOTBLOCK_CAR to common postcodes and use it
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src: Move POST_BOOTBLOCK_CAR to common postcodes and use it

This moves the definition for POST_BOOTBLOCK_CAR from the intel-specific
postcodes into the common postcode list, and uses it for the
cache-as-RAM init as needed.

Because POST_BOOTBLOCK_CAR was set to 0x20 in some spots and 0x21 in
most of the others, the values were consolidated into 0x21.  This will
change the value on some platforms.

Any conflicts should get sorted out later in the conversion process.

Signed-off-by: Martin Roth 
Change-Id: I8527334e679a23006b77a5645f919aea76dd4926
---
M src/commonlib/include/commonlib/console/post_codes.h
M src/cpu/qemu-x86/cache_as_ram_bootblock.S
M src/drivers/intel/fsp1_1/cache_as_ram.S
M src/include/cpu/intel/post_codes.h
M src/soc/intel/common/block/include/intelblocks/post_codes.h
5 files changed, 28 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/71596/3