[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Correct read width in RMW cycle

[Angel Pons (Code Review)]

Attention is currently required from: Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47098 )

Change subject: sb/intel/lynxpoint: Correct read width in RMW cycle
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Patch Set 4:

(1 comment)

File src/southbridge/intel/lynxpoint/sata.c:

https://review.coreboot.org/c/coreboot/+/47098/comment/ad39be4d_f6eb40f3 
PS4, Line 70: 	reg32 = pci_read_config32(dev, 0x98);
> IIRC, I checked reference code and it does a 32-bit read. […]

I've checked, and reference code always does 32-bit operations.