Attention is currently required from: Martin Roth, Patrick Rudolph. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51101 )
Change subject: soc/intel/xeon_sp: Report TXT errors in the bootblock ......................................................................
soc/intel/xeon_sp: Report TXT errors in the bootblock
Change-Id: I0c0d0781738cc0fb6b7bbd1e5abd60777154831e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/security/intel/txt/Makefile.inc M src/soc/intel/xeon_sp/bootblock.c 2 files changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/51101/1
diff --git a/src/security/intel/txt/Makefile.inc b/src/security/intel/txt/Makefile.inc index cdcbd40..f4165f6 100644 --- a/src/security/intel/txt/Makefile.inc +++ b/src/security/intel/txt/Makefile.inc @@ -1,5 +1,8 @@ ifeq ($(CONFIG_INTEL_TXT),y)
+bootblock-y += common.c +bootblock-$(CONFIG_INTEL_TXT_LOGGING) += logging.c + romstage-y += romstage.c romstage-y += getsec_sclean.S romstage-y += getsec.c diff --git a/src/soc/intel/xeon_sp/bootblock.c b/src/soc/intel/xeon_sp/bootblock.c index baf5ab5..f4675e1 100644 --- a/src/soc/intel/xeon_sp/bootblock.c +++ b/src/soc/intel/xeon_sp/bootblock.c @@ -11,6 +11,7 @@ #include <soc/pci_devs.h> #include <soc/bootblock.h> #include <fsp/util.h> +#include <security/intel/txt/txt.h>
const FSPT_UPD temp_ram_init_params = { .FspUpdHeader = { @@ -71,4 +72,7 @@ if (CONFIG(FSP_CAR)) report_fspt_output(); bootblock_pch_init(); + + if (CONFIG(INTEL_TXT_LOGGING)) + intel_txt_log_bios_acm_error(); }