[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge/psp: use PSP_MAILBOX_BAR define

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59700 )

Change subject: soc/amd/stoneyridge/psp: use PSP_MAILBOX_BAR define
......................................................................

soc/amd/stoneyridge/psp: use PSP_MAILBOX_BAR define

PSP_MAILBOX_BAR is defined as PCI_BASE_ADDRESS_4, so use it instead of
PCI_BASE_ADDRESS_4 in the code.

Signed-off-by: Felix Held 
Change-Id: I8658b674b9adea85dfc71d7036ccf3ae17464b58
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59700
Tested-by: build bot (Jenkins) 
Reviewed-by: Paul Menzel 
Reviewed-by: Raul Rangel 
---
M src/soc/amd/stoneyridge/psp.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Raul Rangel: Looks good to me, approved

diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c
index 8d6290f..b001d5f 100644
--- a/src/soc/amd/stoneyridge/psp.c
+++ b/src/soc/amd/stoneyridge/psp.c
@@ -51,7 +51,7 @@
    		return 0;
    	}
    } else {
-		psp_mmio = pci_read_config32(SOC_PSP_DEV, PCI_BASE_ADDRESS_4) &
+		psp_mmio = pci_read_config32(SOC_PSP_DEV, PSP_MAILBOX_BAR) &
    			~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
    }