the following patch was just integrated into master: commit 791d0580b8961decbc9a841b58341340ac206c4f Author: Duncan Laurie dlaurie@google.com Date: Tue Dec 22 17:09:16 2015 -0800
broadwell: Fix SATA Gen3 DTLE configuration registers
The port0 and port1 registers were swapped, which meant it did not work to apply the DTLE settings to the correct SATA port.
This was tested on an unreleased mainboard but is verified with the documentation to be the correct register addresses now.
Change-Id: Ifb8890a563a741129ec8ddf72e73ab021c7d33da Signed-off-by: Duncan Laurie dlaurie@google.com Reviewed-on: https://review.coreboot.org/12793 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com
See https://review.coreboot.org/12793 for details.
-gerrit