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EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68469 )
Change subject: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles
......................................................................
Patch Set 4:
(1 comment)
File src/soc/amd/mendocino/chip.h:
https://review.coreboot.org/c/coreboot/+/68469/comment/f108b202_d37b8150
PS4, Line 77: uint32_t sustained_power_limit_mW_B;
: uint32_t fast_ppt_limit_mW_B;
: uint32_t slow_ppt_limit_mW_B;
: uint32_t slow_ppt_time_constant_s_B;
: uint32_t thermctl_limit_degreeC_B;
- OK, I will remove the same for everything items. […]
Hi Tim,
The reason above is from my point of view, to clarify the design, I will contact thermal team and ask them for help.
BR,
Eric KY Cheng
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