Hello Aaron Durbin, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33283
to look at the new patch set (#4).
Change subject: spi_flash: Add Dual SPI support ......................................................................
spi_flash: Add Dual SPI support
This patch adds support to read SPI flash in Dual SPI mode, where both MISO and MOSI lines are used for output mode (specifically Fast Read Dual Output (0x3b) where the command is still sent normally, not Fast Read Dual I/O (0xbb) whose additional benefit should be extremely marginal for our use cases but which would be more complicated to implement). This feature needs to be supported by both the flash chip and the controller, so we add a new dual_spi flag (and a new flags field to hold it) to the spi_flash structure and a new optional xfer_dual() function pointer to the spi_ctrlr structure. When both are provided, Dual SPI mode is used automatically, otherwise things work as before.
This patch only adds the dual_spi flag exemplary to all Winbond flash chips, other vendors need to be added as needed.
Change-Id: Ic6808224c99af32b6c5c43054135c8f4c03c1feb Signed-off-by: Julius Werner jwerner@chromium.org --- M src/drivers/spi/gigadevice.c M src/drivers/spi/spi_flash.c M src/drivers/spi/spi_flash_internal.h M src/drivers/spi/winbond.c M src/include/spi-generic.h M src/include/spi_flash.h 6 files changed, 87 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/33283/4