[coreboot-gerrit] Change in coreboot[master]: haswell: Add Intel TXT support in romstage

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46608 )

Change subject: haswell: Add Intel TXT support in romstage
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Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46608/5/src/security/intel/txt/comm... 
File src/security/intel/txt/common.c:

https://review.coreboot.org/c/coreboot/+/46608/5/src/security/intel/txt/comm... 
PS5, Line 310: 	//write32((void *)MCU_BASE_ADDR, 0xffe1a990);
> Thanks for the pointer. We don't set up the APs anywhere. […]

I'm going to merge this as-is, as I'd like to ensure the upcoming coreboot release has the means to recover from TXT-blocked memory. Even if the current approach doesn't always succeed on the first try, it's much better than not trying at all.

I've updated the commit message to explain this issue, and I will look into implementing the AP init sequence in the (hopefully near) future.