[coreboot-gerrit] Change in coreboot[master]: [TEST] soc/intel/alderlake:set slopes,enable ER & RTH

[Anshul Bansal (Code Review)]

Anshul Bansal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62972 )

Change subject: [TEST] soc/intel/alderlake:set slopes,enable ER & RTH
......................................................................

[TEST] soc/intel/alderlake:set slopes,enable ER & RTH

Reported-by: Bansal, Anshul 
Signed-off-by: Bansal, Anshul 
Change-Id: Idef4b90d29e831a5bdcd4c301e4bdb646ac9ef15
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 5 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/62972/1

diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index ee91958..27dddc7 100755
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -723,8 +723,11 @@
    }

s_cfg->C1StateAutoDemotion = !config->disable_c1_state_auto_demotion;
-	s_cfg->PchPmDisableEnergyReport = 0x0;
-    s_cfg->RaceToHalt = 0x1;
+	s_cfg->PchPmDisableEnergyReport = 0x0; 
+                   s_cfg->RaceToHalt = 0x1;
+                   s_cfg->ImonSlope[0] = 143;
+                   s_cfg->ImonSlope[1] = 103;
+                   s_cfg->VccInAuxImonSlope = 111;
 }

static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg,