[coreboot-gerrit] Change in coreboot[master]: mb/intel/wtm2: Use Haswell CPU code

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46947 )

Change subject: mb/intel/wtm2: Use Haswell CPU code
......................................................................

mb/intel/wtm2: Use Haswell CPU code

Change-Id: I478576afa3b390cf5480298aafe6e049b5e90bff
Signed-off-by: Angel Pons 
---
M src/mainboard/intel/wtm2/Kconfig
M src/mainboard/intel/wtm2/devicetree.cb
2 files changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46947/1

diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig
index 2f6b21e..61d7657 100644
--- a/src/mainboard/intel/wtm2/Kconfig
+++ b/src/mainboard/intel/wtm2/Kconfig
@@ -2,6 +2,7 @@

config BOARD_SPECIFIC_OPTIONS
    def_bool y
+	select CPU_INTEL_HASWELL
    select SOC_INTEL_BROADWELL
    select BOARD_ROMSIZE_KB_8192
    select HAVE_ACPI_TABLES
diff --git a/src/mainboard/intel/wtm2/devicetree.cb b/src/mainboard/intel/wtm2/devicetree.cb
index 29041aa..9090999 100644
--- a/src/mainboard/intel/wtm2/devicetree.cb
+++ b/src/mainboard/intel/wtm2/devicetree.cb
@@ -10,7 +10,10 @@
    register "gpu_dp_b_hotplug" = "0x06"

device cpu_cluster 0 on
-		device lapic 0 on end
+		chip cpu/intel/haswell
+			device lapic 0 on end
+			device lapic 0xacac off end
+		end
    end
    device domain 0 on
    	device pci 00.0 on  end	# host bridge