ChiaLing has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75678?usp=email )
Change subject: soc/intel/common: Add PsysPl1 support ......................................................................
soc/intel/common: Add PsysPl1 support
Set PsysPL1 in set_power_limits in order to increase system performance for no battery design. More power budget for SOC may be released accordingly.
BUG=b:281479111 TEST=emerge-dedede coreboot and check PsysPl1 value on DUT
Signed-off-by: Chia-Ling Hou chia-ling.hou@intel.com Change-Id: I0b2cf2c90ddef422c121e90edbe79dacb7e29320 --- M src/soc/intel/common/block/include/intelblocks/power_limit.h M src/soc/intel/common/block/power_limit/power_limit.c 2 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/75678/1
diff --git a/src/soc/intel/common/block/include/intelblocks/power_limit.h b/src/soc/intel/common/block/include/intelblocks/power_limit.h index 290a3a3..8648ac0 100644 --- a/src/soc/intel/common/block/include/intelblocks/power_limit.h +++ b/src/soc/intel/common/block/include/intelblocks/power_limit.h @@ -22,6 +22,8 @@ uint16_t tdp_pl1_override; /* PL2 Override value in Watts */ uint16_t tdp_pl2_override; + /* SysPL1 Value in Watts */ + uint16_t tdp_psyspl1; /* SysPL2 Value in Watts */ uint16_t tdp_psyspl2; /* SysPL3 Value in Watts */ @@ -34,6 +36,8 @@ uint16_t tdp_pl4; /* Estimated maximum platform power in Watts */ uint16_t psys_pmax; + /* Minimun ROP */ + uint16_t min_rop; };
/* Configure power limits for turbo mode */ diff --git a/src/soc/intel/common/block/power_limit/power_limit.c b/src/soc/intel/common/block/power_limit/power_limit.c index adf391f..b5b4208 100644 --- a/src/soc/intel/common/block/power_limit/power_limit.c +++ b/src/soc/intel/common/block/power_limit/power_limit.c @@ -160,6 +160,18 @@ MCHBAR32(MCH_PKG_POWER_LIMIT_LO) = limit.lo & (~(PKG_POWER_LIMIT_EN)); MCHBAR32(MCH_PKG_POWER_LIMIT_HI) = limit.hi;
+ /* Set PsysPl1 */ + if (conf->tdp_psyspl1) { + limit = rdmsr(MSR_PLATFORM_POWER_LIMIT); + printk(BIOS_INFO, "CPU PsysPL1 = %u Watts\n", + conf->tdp_psyspl1); + limit.lo |= (conf->tdp_psyspl1 * power_unit) & + PKG_POWER_LIMIT_MASK; + limit.lo |= PKG_POWER_LIMIT_CLAMP; + limit.lo |= PKG_POWER_LIMIT_EN; + wrmsr(MSR_PLATFORM_POWER_LIMIT, limit); + } + /* Set PsysPl2 */ if (conf->tdp_psyspl2) { limit = rdmsr(MSR_PLATFORM_POWER_LIMIT);