Tongtong Pan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83797?usp=email )
Change subject: mb/google/dedede:Add fw_config control to wifi driver ......................................................................
mb/google/dedede:Add fw_config control to wifi driver
BUG=b:351968527
Change-Id: I4d79051222a797d8a7805815092915e59b605468 Signed-off-by: Tongtong Pan pantongtong@huaqin.corp-partner.google.com --- M src/mainboard/google/dedede/variants/awasuki/overridetree.cb M src/mainboard/google/dedede/variants/awasuki/ramstage.c 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/83797/1
diff --git a/src/mainboard/google/dedede/variants/awasuki/overridetree.cb b/src/mainboard/google/dedede/variants/awasuki/overridetree.cb index 148840f..32fad8f 100644 --- a/src/mainboard/google/dedede/variants/awasuki/overridetree.cb +++ b/src/mainboard/google/dedede/variants/awasuki/overridetree.cb @@ -1,3 +1,11 @@ +fw_config + field WIFI 8 9 + option UNKNOWN 0 + option WIFI_6 1 + option WIFI_6E 2 + end +end + chip soc/intel/jasperlake # USB Port Configuration register "usb2_ports[1]" = "USB2_PORT_EMPTY" @@ -161,6 +169,7 @@ end end # USB xHCI device pci 14.3 on + probe WIFI WIFI_6E chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" register "enable_cnvi_ddr_rfim" = "true" @@ -216,6 +225,7 @@ end end # I2C 4 device pci 1c.7 on + probe WIFI WIFI_6 chip drivers/wifi/generic register "wake" = "GPE0_DW2_03" device pci 00.0 on end diff --git a/src/mainboard/google/dedede/variants/awasuki/ramstage.c b/src/mainboard/google/dedede/variants/awasuki/ramstage.c index 418826c..d69d912 100644 --- a/src/mainboard/google/dedede/variants/awasuki/ramstage.c +++ b/src/mainboard/google/dedede/variants/awasuki/ramstage.c @@ -4,6 +4,8 @@ #include <fw_config.h> #include <soc/soc_chip.h> #include <soc/gpio.h> +#include <console/console.h> +#include <chip.h>
static const struct pad_config ts_disable_pad[] = { /* A11 : TOUCH_RPT_EN */ @@ -22,6 +24,13 @@ PAD_NC(GPP_H5, NONE), };
+static const struct pad_config wifi_pcie_enable_pad[] = { + /* B8 : WLAN_CLKREQ_ODL */ + PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), + /* D3 : WLAN_PCIE_WAKE_ODL */ + PAD_CFG_GPI_SCI_LOW(GPP_D3, NONE, DEEP, EDGE_SINGLE), +}; + void variant_devtree_update(void) { struct soc_intel_jasperlake_config *cfg = config_of_soc(); @@ -34,4 +43,9 @@ cfg->SerialIoI2cMode[PchSerialIoIndexI2C2] = PchSerialIoDisabled; gpio_configure_pads(ts_disable_pad, ARRAY_SIZE(ts_disable_pad)); } + + if (fw_config_probe(FW_CONFIG(WIFI, WIFI_6))) { + printk(BIOS_INFO, "Enable PCie based Wifi GPIO pins.\n"); + gpio_configure_pads(wifi_pcie_enable_pad,ARRAY_SIZE(wifi_pcie_enable_pad)); + } }