Attention is currently required from: Ivy Jian, Kapil Porwal, Subrata Banik, Tarun Tuli.
Hello Ivy Jian, Kapil Porwal, Subrata Banik, Tarun Tuli,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75892?usp=email
to look at the new patch set (#3).
Change subject: soc/intel/meteorlake: Update tcss_usb3 alias ......................................................................
soc/intel/meteorlake: Update tcss_usb3 alias
TCSS and TBT use the same lane on schematic. Update the port start from 0 to match the Intel schematic. You can better follow the it without convert the port number.
Signed-off-by: Eric Lai eric_lai@quanta.corp-partner.google.com Change-Id: Ic6631dcbbd9f6c79c756b015425e2da778eb395e --- M src/mainboard/google/rex/variants/ovis/overridetree.cb M src/mainboard/google/rex/variants/rex0/overridetree.cb M src/mainboard/google/rex/variants/screebo/overridetree.cb M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb M src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb M src/soc/intel/meteorlake/chipset.cb M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/meteorlake/retimer.c 8 files changed, 39 insertions(+), 39 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/75892/3