Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44498 )
Change subject: nb/amd/agesa: define DDR3_SPD_SIZE as a common value ......................................................................
nb/amd/agesa: define DDR3_SPD_SIZE as a common value
Move a size of DDR3 SPD memory (always 256 bytes) to a common define.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I80c89ff6e44526e1d75b0e933b21801ed17c98c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44498 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/amd/agesa/family14/dimmSpd.c M src/northbridge/amd/agesa/family15tn/dimmSpd.c M src/northbridge/amd/agesa/family16kb/dimmSpd.c M src/vendorcode/amd/agesa/f14/AGESA.h M src/vendorcode/amd/agesa/f15tn/AGESA.h M src/vendorcode/amd/agesa/f16kb/AGESA.h 6 files changed, 9 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c index e4d1eab..3ce84a4 100644 --- a/src/northbridge/amd/agesa/family14/dimmSpd.c +++ b/src/northbridge/amd/agesa/family14/dimmSpd.c @@ -40,7 +40,7 @@ if (spdAddress == 0) return AGESA_ERROR;
- int err = smbus_readSpd(spdAddress, (void *) info->Buffer, 256); + int err = smbus_readSpd(spdAddress, (void *) info->Buffer, DDR3_SPD_SIZE); if (err) return AGESA_ERROR; return AGESA_SUCCESS; diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c index 6504d14..70a7b92 100644 --- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c +++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c @@ -39,7 +39,7 @@ if (spdAddress == 0) return AGESA_ERROR;
- int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 256); + int err = hudson_readSpd(spdAddress, (void *) info->Buffer, DDR3_SPD_SIZE); if (err) return AGESA_ERROR; return AGESA_SUCCESS; diff --git a/src/northbridge/amd/agesa/family16kb/dimmSpd.c b/src/northbridge/amd/agesa/family16kb/dimmSpd.c index b20216f..58b35e0 100644 --- a/src/northbridge/amd/agesa/family16kb/dimmSpd.c +++ b/src/northbridge/amd/agesa/family16kb/dimmSpd.c @@ -39,7 +39,7 @@ if (spdAddress == 0) return AGESA_ERROR;
- int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 256); + int err = hudson_readSpd(spdAddress, (void *) info->Buffer, DDR3_SPD_SIZE); if (err) return AGESA_ERROR; return AGESA_SUCCESS; diff --git a/src/vendorcode/amd/agesa/f14/AGESA.h b/src/vendorcode/amd/agesa/f14/AGESA.h index 03f1670..e7d02fa 100644 --- a/src/vendorcode/amd/agesa/f14/AGESA.h +++ b/src/vendorcode/amd/agesa/f14/AGESA.h @@ -1158,9 +1158,10 @@ /// /// SPD Data for each DIMM. /// +#define DDR3_SPD_SIZE 256 typedef struct _SPD_DEF_STRUCT { IN BOOLEAN DimmPresent; ///< Indicates that the DIMM is present and Data is valid - IN UINT8 Data[256]; ///< Buffer for 256 Bytes of SPD data from DIMM + IN UINT8 Data[DDR3_SPD_SIZE]; ///< Buffer for 256 Bytes of SPD data from DIMM } SPD_DEF_STRUCT;
/// diff --git a/src/vendorcode/amd/agesa/f15tn/AGESA.h b/src/vendorcode/amd/agesa/f15tn/AGESA.h index 922a8ee..d41a5ee 100644 --- a/src/vendorcode/amd/agesa/f15tn/AGESA.h +++ b/src/vendorcode/amd/agesa/f15tn/AGESA.h @@ -1546,9 +1546,10 @@ /// /// SPD Data for each DIMM. /// +#define DDR3_SPD_SIZE 256 typedef struct _SPD_DEF_STRUCT { IN BOOLEAN DimmPresent; ///< Indicates that the DIMM is present and Data is valid - IN UINT8 Data[256]; ///< Buffer for 256 Bytes of SPD data from DIMM + IN UINT8 Data[DDR3_SPD_SIZE]; ///< Buffer for 256 Bytes of SPD data from DIMM } SPD_DEF_STRUCT;
/// diff --git a/src/vendorcode/amd/agesa/f16kb/AGESA.h b/src/vendorcode/amd/agesa/f16kb/AGESA.h index 7e43de4..853fdc9 100644 --- a/src/vendorcode/amd/agesa/f16kb/AGESA.h +++ b/src/vendorcode/amd/agesa/f16kb/AGESA.h @@ -1621,9 +1621,10 @@ /// /// SPD Data for each DIMM. /// +#define DDR3_SPD_SIZE 256 typedef struct _SPD_DEF_STRUCT { IN BOOLEAN DimmPresent; ///< Indicates that the DIMM is present and Data is valid - IN UINT8 Data[256]; ///< Buffer for 256 Bytes of SPD data from DIMM + IN UINT8 Data[DDR3_SPD_SIZE]; ///< Buffer for 256 Bytes of SPD data from DIMM } SPD_DEF_STRUCT;
///