Jon Murphy has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74670 )
Change subject: mb/google/myst: Add mainboard chip.h ......................................................................
mb/google/myst: Add mainboard chip.h
Add mainboard chip.h to allow for using additional includes and specifically net names within the devicetree.
BUG=b:278969100 TEST=builds
Change-Id: I52be99c168ce0fd6f08258da443eeaebdfb78d0a Signed-off-by: Jon Murphy jpmurphy@google.com --- M src/mainboard/google/myst/mainboard.c A src/mainboard/google/myst/variants/baseboard/chip.h M src/mainboard/google/myst/variants/baseboard/devicetree.cb 3 files changed, 169 insertions(+), 135 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/74670/1
diff --git a/src/mainboard/google/myst/mainboard.c b/src/mainboard/google/myst/mainboard.c index e433c98..457421b 100644 --- a/src/mainboard/google/myst/mainboard.c +++ b/src/mainboard/google/myst/mainboard.c @@ -7,6 +7,11 @@ #include <device/device.h> #include <variant/ec.h>
+struct chip_operations mainboard_google_myst_variants_baseboard_ops = { + CHIP_NAME("Google Myst MB") + .enable_dev = NULL, +}; + static const struct fch_irq_routing fch_irq_map[] = { { 0, 0x00, 0x00 }, }; diff --git a/src/mainboard/google/myst/variants/baseboard/chip.h b/src/mainboard/google/myst/variants/baseboard/chip.h new file mode 100644 index 0000000..86825e5 --- /dev/null +++ b/src/mainboard/google/myst/variants/baseboard/chip.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <variant/gpio.h> + +#ifndef MB_GOOGLE_MYST_CHIP_H +#define MB_GOOGLE_MYST_CHIP_H + +struct mainboard_google_myst_variants_baseboard_config {}; + +#endif \ No newline at end of file diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb index fbc9e93..ba7d5ba 100644 --- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb @@ -1,153 +1,156 @@ # SPDX-License-Identifier: GPL-2.0-or-later -chip soc/amd/phoenix - register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | - GPIO_I2C2_SCL | GPIO_I2C3_SCL" +chip mainboard/google/myst/variants/baseboard + device domain 0 off end # dummy + chip soc/amd/phoenix + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | + GPIO_I2C2_SCL | GPIO_I2C3_SCL"
- # I2C Pad Control RX Select Configuration - register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" # Trackpad - register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" # Touchscreen - register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # GSC - register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # Speaker, Codec, P-SAR, USB + # I2C Pad Control RX Select Configuration + register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" # Trackpad + register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" # Touchscreen + register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # GSC + register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # Speaker, Codec, P-SAR, USB
- # I2C Config - #+-------------------+----------------------------+ - #| Field | Value | - #+-------------------+----------------------------+ - #| I2C0 | Trackpad | - #| I2C1 | Touchscreen | - #| I2C2 | GSC TPM | - #| I2C3 | Speaker, Codec, P-SAR, USB | - #+-------------------+----------------------------+ - register "i2c[0]" = "{ - .speed = I2C_SPEED_FAST, - }" + # I2C Config + #+-------------------+----------------------------+ + #| Field | Value | + #+-------------------+----------------------------+ + #| I2C0 | Trackpad | + #| I2C1 | Touchscreen | + #| I2C2 | GSC TPM | + #| I2C3 | Speaker, Codec, P-SAR, USB | + #+-------------------+----------------------------+ + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + }"
- register "i2c[1]" = "{ - .speed = I2C_SPEED_FAST, - }" + register "i2c[1]" = "{ + .speed = I2C_SPEED_FAST, + }"
- register "i2c[2]" = "{ - .speed = I2C_SPEED_FAST, - .early_init = true, - }" + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + .early_init = true, + }"
- register "i2c[3]" = "{ - .speed = I2C_SPEED_FAST, - }" + register "i2c[3]" = "{ + .speed = I2C_SPEED_FAST, + }"
- device domain 0 on - device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A - device ref gfx on end # Internal GPU (GFX) - device ref xhci_0 on # USB 3.1 (USB0) - chip drivers/usb/acpi - device ref xhci_0_root_hub on - chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Port A0 (MLB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" - device ref usb3_port0 on end - end - chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Port A1 (DB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" - register "group" = "ACPI_PLD_GROUP(1, 2)" - device ref usb3_port1 on end - end - chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port A0 (MLB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" - device ref usb2_port0 on end - end - chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port A1 (DB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" - device ref usb2_port1 on end - end - chip drivers/usb/acpi - register "desc" = ""User-Facing Camera"" - register "type" = "UPC_TYPE_INTERNAL" - device ref usb2_port2 on end - end - chip drivers/usb/acpi - register "desc" = ""World-Facing Camera"" - register "type" = "UPC_TYPE_INTERNAL" - device ref usb2_port3 on end - end - chip drivers/usb/acpi - register "desc" = ""Bluetooth"" - register "type" = "UPC_TYPE_INTERNAL" - register "has_power_resource" = "true" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_154)" - register "enable_delay_ms" = "500" - register "enable_off_delay_ms" = "200" - register "use_gpio_for_status" = "true" - device ref usb2_port4 on end + device domain 0 on + device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A + device ref gfx on end # Internal GPU (GFX) + device ref xhci_0 on # USB 3.1 (USB0) + chip drivers/usb/acpi + device ref xhci_0_root_hub on + chip drivers/usb/acpi + register "desc" = ""USB3 Type-A Port A0 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + device ref usb3_port0 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-A Port A1 (DB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" + register "group" = "ACPI_PLD_GROUP(1, 2)" + device ref usb3_port1 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Port A0 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + device ref usb2_port0 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Port A1 (DB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" + device ref usb2_port1 on end + end + chip drivers/usb/acpi + register "desc" = ""User-Facing Camera"" + register "type" = "UPC_TYPE_INTERNAL" + device ref usb2_port2 on end + end + chip drivers/usb/acpi + register "desc" = ""World-Facing Camera"" + register "type" = "UPC_TYPE_INTERNAL" + device ref usb2_port3 on end + end + chip drivers/usb/acpi + register "desc" = ""Bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + register "has_power_resource" = "true" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(BT_DISABLE)" + register "enable_delay_ms" = "500" + register "enable_off_delay_ms" = "200" + register "use_gpio_for_status" = "true" + device ref usb2_port4 on end + end end end end end - end - device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C - device ref usb4_xhci_0 on - chip drivers/usb/acpi - register "type" = "UPC_TYPE_HUB" - device ref usb4_xhci_0_root_hub on - chip drivers/usb/acpi - register "desc" = ""USB4 Type-C Port C0 (MLB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" - device ref usb3_port6 on end + device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C + device ref usb4_xhci_0 on + chip drivers/usb/acpi + register "type" = "UPC_TYPE_HUB" + device ref usb4_xhci_0_root_hub on + chip drivers/usb/acpi + register "desc" = ""USB4 Type-C Port C0 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" + device ref usb3_port6 on end + end + chip drivers/usb/acpi + register "desc" = ""USB4 Type-C Port C0 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" + device ref usb2_port6 on end + end end - chip drivers/usb/acpi - register "desc" = ""USB4 Type-C Port C0 (MLB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" - device ref usb2_port6 on end + end + end + device ref usb4_xhci_1 on + chip drivers/usb/acpi + register "type" = "UPC_TYPE_HUB" + device ref usb4_xhci_1_root_hub on + chip drivers/usb/acpi + register "desc" = ""USB4 Type-C Port C1 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" + device ref usb3_port7 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-C Port C1 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" + device ref usb2_port7 on end + end end end end end - device ref usb4_xhci_1 on - chip drivers/usb/acpi - register "type" = "UPC_TYPE_HUB" - device ref usb4_xhci_1_root_hub on - chip drivers/usb/acpi - register "desc" = ""USB4 Type-C Port C1 (MLB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" - device ref usb3_port7 on end - end - chip drivers/usb/acpi - register "desc" = ""USB2 Type-C Port C1 (MLB)"" - register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" - device ref usb2_port7 on end - end - end + device ref iommu on end + device ref lpc_bridge on + chip ec/google/chromeec + device pnp 0c09.0 alias chrome_ec on end end end - end - device ref iommu on end - device ref lpc_bridge on - chip ec/google/chromeec - device pnp 0c09.0 alias chrome_ec on end - end - end - end # domain - device ref uart_0 on end # UART0 - device ref i2c_0 on end - device ref i2c_1 on end - device ref i2c_2 on end - device ref i2c_3 on end -end # chip soc/amd/phoenix + end # domain + device ref uart_0 on end # UART0 + device ref i2c_0 on end + device ref i2c_1 on end + device ref i2c_2 on end + device ref i2c_3 on end + end # chip soc/amd/phoenix +end # chip mainboard/google/myst/variants/baseboard