[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/alderlake: Add support for PCIe speed setting

[Paul Menzel (Code Review)]

Attention is currently required from: David Wu, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro.

Paul Menzel has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/85519?usp=email )

The change is no longer submittable: All-Comments-Resolved is unsatisfied now.

Change subject: soc/intel/alderlake: Add support for PCIe speed setting
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Patch Set 4:

(2 comments)

File src/soc/intel/common/block/include/intelblocks/pcie_rp.h:

https://review.coreboot.org/c/coreboot/+/85519/comment/45263e93_ad3e8ac3?usp... :
PS4, Line 61: PCIE
PCIe

https://review.coreboot.org/c/coreboot/+/85519/comment/aaf44106_2bb6564d?usp... :
PS4, Line 84: Pcie
PCIe as above.