Shaunak Saha (shaunak.saha@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16647
-gerrit
commit 3dd9f11e57b8b8bfabf290af7a831ca591ffb007 Author: Shaunak Saha shaunak.saha@intel.com Date: Mon Sep 19 14:55:24 2016 -0700
soc/apollolake: Correct the comment section in gpio.asl
This patch corrects the comment section in gpio.asl for GPE method.
Change-Id: I45771a295ee1eda00b9699f42cddd120223ff7bf Signed-off-by: Shaunak Saha shaunak.saha@intel.com --- src/soc/intel/apollolake/acpi/gpio.asl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/apollolake/acpi/gpio.asl b/src/soc/intel/apollolake/acpi/gpio.asl index 4f3bc3e..ffc5b75 100644 --- a/src/soc/intel/apollolake/acpi/gpio.asl +++ b/src/soc/intel/apollolake/acpi/gpio.asl @@ -191,7 +191,8 @@ scope (_SB) {
Scope(_GPE) { - /* Dummy method for the Tier 1 GPIO SCI enable bit. When kernel reads + /* + * Dummy method for the Tier 1 GPIO SCI enable bit. When kernel reads * _L0F in scope GPE it sets bit for gpio_tier1_sci_en in ACPI enable * register at 0x430. For APL ACPI enable register DW0 i.e., ACPI * GPE0a_EN at 0x430 is reserved.